Key 7 Takeaways from Satish Sridharan's Open-Source Chip Design Keynote

 

From "Nobody Got Fired for Using Mainstream Tools" to AI-Native Chip Design: Key Takeaways from Satish Sridharan's Keynote

Keynote at the AsFigo Open-Source Chip Design & Verification Bootcamp, 31 August 2026, Bengaluru

Satish Sridharan, Senior Director of Digital (Timing Business Unit) at Aura Semiconductor, opened the AsFigo bootcamp with a keynote tracing the arc of open source in chip design — from a cost play to a genuine engine of innovation, now accelerating further under AI. With over 30 years in the industry (Aura Semiconductor, prior stints at Infinera and Vitesse Semiconductors), and hands-on experience with mixed-signal verification challenges, he brought a design-side veteran's perspective to a room mostly focused on verification. Here are the key takeaways.

1. The EDA industry's own history explains why open source was ever in doubt

Satish set the stage with a quick tour of how far EDA tooling has come — from manually placed schematic-capture designs on gallium arsenide, through the MOSFET/CMOS transition, to the modern stack of synthesis, DFT, LEC, STA, PNR, DRC and more. His blunt framing of the old tooling tax:

"We used to say 25–30% you do the design, 70% is fighting the tools."

That ratio, he argued, has effectively flipped — tools have matured enough that engineers now spend most of their time on actual design and verification work, not fighting the tooling itself. But that maturity took decades, and it's the backdrop for why any new class of tools — including open source — has to earn trust from scratch.

2. Open source's origin story in EDA was about cost — and it followed the Linux script exactly

Early open-source EDA adoption, in his telling, was driven by a simple problem: commercial licenses were out of reach for startups and small teams, even single-seat licenses. The internet's proliferation was the real unlock — without it, nobody could publish what they'd built, and nobody could find it.

He drew a direct parallel to Linux's own adoption curve: skepticism about whether it would work, whether it was secure, whether it could scale, whether bugs would actually get fixed — a classic chicken-and-egg problem. His summary of the risk-aversion that held it back for years:

"Nobody got fired for using mainstream tools."

Linux won that argument eventually and now — with some irony he pointed out directly — it's the default underlying platform for the very commercial EDA tools that once out-competed it.

3. The same skepticism cycle is now playing out for verification and PNR — with higher stakes

Satish was candid that open-source chip design/verification tools are re-running the Linux playbook, but in a domain where the tolerance for error is far smaller: chips today are timed in femtoseconds, and "off by a femtosecond" can mean a non-functional part. That precision bar is exactly why skepticism here is healthy, not just resistance to change.

His honest assessment of where open source still has real gaps: coverage and formal verification for analog/mixed-signal circuits are still catching up. As more chips integrate mixed-signal content, he expects this gap to close "sooner than later" simply because the market need is real.

4. The unlock wasn't just tools — it was PDK availability

A recurring theme: cheaper/free tools alone don't create an ecosystem. The real turning point he highlighted was the availability of open PDKs (with efforts like Google's contributions), which let platforms such as eFabless and Tiny Tapeout stitch together a complete, usable flow. Once that missing link was in place, his framing of what it now takes to get started was simple:

"Have a good laptop. Have a good internet connection. Have a great idea. That's all you need."

He name-checked a working open-source stack across the flow — Chisel for hardware design frameworks, cocotb for verification, GTKWave for waveform debug, and OpenROAD for RTL-to-GDSII — as evidence this isn't hypothetical anymore.

5. Verification is where the real weight sits

Satish, speaking as a design lead, was explicit that design sign-off quality is bounded by verification quality: "the quality of the ASIC is only as good as the quality of the methodology you have for verification, and how diligent that team is." Every open-source tool added to the flow has to be a complete, non-breaking link in the chain — one weak link and confidence in the whole flow erodes.

6. AI is compressing timelines that used to take years into weeks

The keynote's second half pivoted to AI as the next multiplier on top of open source. His central caution — a line he attributed to a shared sentiment with an earlier speaker (Ray Salemi) at the same event — was:

"AI is your helper, you're the driver."

Practically, he framed AI as removing the last major barrier: you no longer need deep scripting/automation expertise to build your own tools — "Hello, AI is sitting right next to you" — but results still need independent checking. He pointed to a very recent open-source-company acquisition as a concrete signal of real commercial momentum behind this shift, and noted that projects that once required an "army of people" over years can now be done by a handful of engineers in weeks.

Concretely, he described AI already showing up in two places at once:

• Front end: generating RTL — with open-source designs increasingly used as the validation corpus for those AI-generated results, since you need "a thousand different angles" of test coverage to trust AI-written code.
• Back end: placement and routing decisions (proximity, wire length, capacitance) — AI-assisted optimization earlier in the flow, not just at the end.

7. The near-term reality is hybrid, not full replacement

Satish was measured, not hype-driven, about where things stand today: open source is already solid for module-level, smoke-level, and subsystem-level testing, where teams are more willing to experiment. But final sign-off, in his view, still leans on commercial EDA tooling for now. His framing:

"Till this becomes a substitute, it's going to be a hybrid approach — but that works well."

The closing message: the barrier to entry has collapsed

He closed by directly pushing back on the old narrative that only large, well-funded companies (or "developed countries") get to innovate in silicon, while other regions "just do services":

"We have access to the same tools that they also have. We have the knowledge and the brain power that they also have. So why can't we leverage all of that?"

It's a fitting note for a bootcamp built entirely around open-source tooling — a reminder that the barriers Satish spent his career watching fall aren't abstract anymore, they're just... gone.